Learn LABVIEW-FPGA with Real Code Examples

// Pseudo-code representation of LabVIEW Scripting for FPGA VI
VI fpgaVI = LabVIEW.NewVI("FPGA");
Node addNode = fpgaVI.BlockDiagram.AddNode("Add");
Wire input1 = fpgaVI.BlockDiagram.AddConstant(3);
Wire input2 = fpgaVI.BlockDiagram.AddConstant(5);
fpgaVI.BlockDiagram.Connect(input1, addNode.Input[0]);
fpgaVI.BlockDiagram.Connect(input2, addNode.Input[1]);
fpgaVI.BlockDiagram.Connect(addNode.Output, fpgaVI.FrontPanel.Indicator("Result"));

LabVIEW scripting nodes create an FPGA VI, add an Add function, and wire constants programmatically. (In practice, this is visual LabVIEW G code, shown here as pseudo-API).

// FPGA VI pseudo-representation
Loop FPGAClock
{
    int input = ReadFPGAInput("In");
    int result = input * 2;
    WriteFPGAOutput("Out", result);
}

An FPGA VI snippet that multiplies input by 2 and outputs the result (graphically wired in LabVIEW, text form shown for illustration).

// FPGA VI pseudo-representation
int counter = 0;
Loop FPGAClock
{
    counter++;
    WriteFPGAOutput("CounterOut", counter);
}

A LabVIEW FPGA VI that implements a simple counter incrementing every clock cycle.

// FPGA VI pseudo-representation
int dutyCycle = 50; // 50 percent
Loop FPGAClock
{
    int clockPhase = GetClockPhase();
    WriteFPGAOutput("PWMOut", (clockPhase < dutyCycle) ? 1 : 0);
}

Generates a PWM output signal on an FPGA using LabVIEW G pseudo-code.

// FPGA VI pseudo-representation
int buffer[4] = {0};
Loop FPGAClock
{
    int input = ReadFPGAInput("In");
    buffer[0] = buffer[1]; buffer[1] = buffer[2]; buffer[2] = buffer[3]; buffer[3] = input;
    int avg = (buffer[0]+buffer[1]+buffer[2]+buffer[3])/4;
    WriteFPGAOutput("FilteredOut", avg);
}

Implements a simple moving average filter in FPGA VI.

// FPGA VI pseudo-representation
int stableCount = 0;
int lastState = 0;
Loop FPGAClock
{
    int current = ReadFPGAInput("Button");
    if(current == lastState) stableCount++;
    else stableCount = 0;
    if(stableCount > 5) WriteFPGAOutput("ButtonDebounced", current);
    lastState = current;
}

Debounces a digital input signal on an FPGA using LabVIEW G pseudo-code.

// FPGA VI pseudo-representation
int acc = 0;
Loop FPGAClock
{
    int a = ReadFPGAInput("A");
    int b = ReadFPGAInput("B");
    acc += a * b;
    WriteFPGAOutput("MACOut", acc);
}

Implements a MAC operation in LabVIEW FPGA pseudo-code.

// FPGA VI pseudo-representation
int counter = 0;
Loop FPGAClock
{
    counter++;
    WriteFPGAOutput("LED", (counter % 100) < 50 ? 1 : 0);
}

Controls LEDs on FPGA board with a blinking pattern.

// FPGA VI pseudo-representation
Loop FPGAClock
{
    byte data = ReadFPGAInput("DataIn");
    SendSerialByte("SerialOut", data);
}

Sends a byte of serial data over FPGA digital output.

// FPGA VI pseudo-representation
const int LUT[8] = {0, 707, 1000, 707, 0, -707, -1000, -707};
int index = 0;
Loop FPGAClock
{
    WriteFPGAOutput("SineOut", LUT[index]);
    index = (index+1) % 8;
}

Generates a sine wave output on FPGA using a lookup table.